Module Frenetic.OpenFlow.OF10.PortDescription.PortState

module StpState : sig ... end
val to_string : Frenetic_kernel__OpenFlow0x01.portState ‑> string
val of_int : Core.Int32.t ‑> Frenetic_kernel__OpenFlow0x01.portState
val to_int : Frenetic_kernel__OpenFlow0x01.portState ‑> Core.Int32.t